And here we’ve been complaining about Flat Pack No-Lead chips when this guy is prototyping with Ball Grid Array in a Wafer-Level Chip Scale Package (WLCSP). Haven’t heard that acronym before?
(Nasdaq: SNPS) today announced that Synopsys and TSMC have collaborated to deliver certified design flows for advanced packaging solutions using the Synopsys 3DIC Compiler product for both silicon ...