A new technical paper titled “Insights Into Design Optimization of Negative Capacitance Complementary-FET (CFET)” was published by researchers at National Yang Ming Chiao Tung University. “This work ...

Results show a suppressed improvement with MFMIS topology over the MFIS topology in the subthreshold region if implemented with the CFET architecture due to the CFET-specific common-gate structure. We ...

Abstract: In this work, we systematically explore the static and dynamic performance of silicon nanosheet (NSH)-based complementary metal–oxide–semiconductor (CMOS) inverters, including complementary ...